The benefits of using thumb instructions are as follows

The address space in ARM is ___________

What is the capability of ARM7 f instruction for a second?

In the ARM, PC is implemented using ___________

An instruction that is used to move data from an ARM Register to a Status Register (CPSR or SPSR) is called _______.

Both baud rate and bit rate imply the same thing.

Application Program Status Register (APSR) access from?

Memory can be accessed in ARM systems by __________ instructions.

The additional duplicate register used in ARM machines are called as _______

While designing an embedded system, which sub-task-oriented process allocates the time steps for various modules that share similar resources?

How do Direct Addressing Mode instructions compare with respect to the Indirect Addressing Mode instructions?

State whether the following statement is either true or false. Reset vector is the location of the first instruction executed by the processor when power is applied. This instruction branches to the initialization code.

The ARM processors don’t support Byte addressability.

What 3 registers make up the Program Status Register (PSR)?

In the ARM Nomenclature ARMxTDMI, D and M stand for

If an instruction takes 3 cycles for execution, then how many cycles are needed for executing4 instructions of the same type in a sequence using a 3-stage pipeline? Assume that there are no interrupts or exceptions while executing them.

Which type of non-privileged processor mode is entered due to the raising of the high priority of an interrupt?

If the three stages of execution in pipelining are overlapped, how would be the speed of execution?

Which microcontrollers are adopted for designing medium-scale embedded systems?

ARM processors where basically designed for _______

In the branch instructions of ARM, what does the mnemonic BVC imply?

In the process of pipelining, which instructions are fetched from the memory by the ARM processor during the execution of current instruction?

Which types of an embedded system involve the coding at a simple level in an embedded 'C', without any necessity of RTOS?

The address system supported by ARM systems is/are ___________

ARM7 has an in-built debugging device?

Which interrupt controller is present in the Cortex-A15 processor?

Each instruction in ARM machines is encoded into __________ Word.

Which type of handshake packet indicates that the device is incapable of accepting data as it is supposed to be busy with some other task?

In CPU structure, what kind of instruction to be executed is held by an Instruction Register (IR)?

In the Cortex-R processor series, which among the following represent/s dual-core configuration along with the space-saving the floating-point unit?

Abort mode generally enters when _______

____ is the processing of instruction broken down to smaller unit

Which among the following is/are integrated by OTG controller in order to implement OTG dual-role device functionality?

ARM stands for _____________

Is the ARM Cortex-M a microprocessor or a microcontroller?

How is the nature of instruction size in CISC processors?

The addressing mode where the EA of the operand is the contents of Rn is ______

The offset used in the conditional branching is __________ bit.

In CPU structure, where is one of the operands provided by an accumulator in order to store the result?

In the Cortex-A processor series, which among the following is the standalone and smallest processor in size constraints with high-end application support?

What is/are the configuration status of the control unit in RISC Processors?

Microprocessors have all of the following.

User Application will run in thread mode if any interrupt or exception event occurs, it will automatically enter in

RISC stands for _________

Where the global variable stored?

24-bits equals how many bytes?

The main importance of ARM microprocessors is providing operation with ______

Which parameter/s is/are included in the 'Time to market' design metric of an embedded system?

In the SPI bus, which signal line carries data from master to slave device & hence regarded as Slave Input/Slave Data In (SI/SDI)?

Which of the following statements are true with respect to pipelining.
I. Pipelining is an implementation technique whereby multiple instructions are overlapped in execution. It is not visible to the programmer
II. Each step is called a pipe stage or pipe segment
III. Pipeline machine cycle is the time required to move an instruction one step down the pipeline

In Von Neumann architecture, which among the following handles all the operations of the system that are inside and outside the processor?

Which type of branching instructions of thumb possesses 11-bit address & is generally applicable for slightly longer jumps in order to implement the instructions like GOTO of high-level languages?

What are the profiles for ARM architecture?

The pseudo instruction used to load an address into the register is _________