Author name: Amlendra

I am an embedded c software engineer and a corporate trainer, currently, I am working as senior software engineer in a largest Software consulting company . I have working experience of different microcontrollers (stm32, LPC, PIC AVR and 8051), drivers (USB and virtual com-port), POS device (VeriFone) and payment gateway (global and first data).

Core Object-Oriented Concepts Every Developer Must Know- Part 2

Object-Oriented Design (OOD) is more than a coding technique — it’s a mindset that mirrors the real-world using software. In our previous blog post, we explored what Object-Oriented Design (OOD) is and why it’s essential in building maintainable, scalable software systems. Now, let’s go deeper into the core concepts of Object-Oriented Programming (OOP) — the […]

Core Object-Oriented Concepts Every Developer Must Know- Part 2 Read More »

WWDG vs IWDG in STM32: Why WWDG Is the Better Watchdog for Many Projects

After working on embedded systems over many years from 8-bit microcontrollers to today’s high-performance STM32 MCUs—one lesson remains constant: A system is only as reliable as its fault recovery strategy. In critical or unattended systems, watchdog timers play a vital role. The STM32H5xx Window Watchdog (WWDG) helps monitor system health. It resets the system if

WWDG vs IWDG in STM32: Why WWDG Is the Better Watchdog for Many Projects Read More »

System window watchdog (WWDG) in STM32

In real-time embedded systems—especially in safety-critical applications like automotive, industrial automation, medical devices, and smart metering—reliable fault detection and recovery mechanisms are critical to maintain system stability and safety. The Window Watchdog (WWDG), available in the STM32H5 series microcontrollers, plays a key role in this area. Unlike basic watchdog timers, the WWDG enforces precise timing

System window watchdog (WWDG) in STM32 Read More »

Understanding MSP vs PSP in ARM Cortex-M

In ARM Cortex-M architectures such as Cortex-M3, Cortex-M4, Cortex-M7, and Cortex-M33, stack management is a fundamental mechanism that enables exception handling, context switching, and real-time operating system (RTOS) operation. One of the unique features of the ARM Cortex-M core is its support for two independent stack pointers: the Main Stack Pointer (MSP) and the Process

Understanding MSP vs PSP in ARM Cortex-M Read More »

SPI Timing Understanding: Master SS Idleness and Inter-Data Delay Explained

In SPI protocol design, timing between control and data signals plays a crucial role in reliable communication, especially in multi-slave, high-speed, or sensitive analog peripheral systems. Two often overlooked but critical timing parameters are: Master SS Idleness Inter-Data Idleness These parameters are available in modern SPI controllers and are vital for ensuring proper synchronization between

SPI Timing Understanding: Master SS Idleness and Inter-Data Delay Explained Read More »

How the IAR Linker Resolves Function Calls Across Files in ARM Cortex-M

In embedded systems — especially with microcontrollers like the STM32H5 (Cortex-M33) — linking is not just a toolchain step. It represents the final integration point where independently compiled code modules, memory layout constraints, and hardware-specific expectations converge into a working binary. Yet, many engineers treat the linker as a black box — something that “just

How the IAR Linker Resolves Function Calls Across Files in ARM Cortex-M Read More »

How the ARM Function Call Stack Frame Works (With C & Assembly Examples)

When writing low-level embedded C code for ARM Cortex-M, understanding the ARM function call stack frame is essential for analyzing memory usage, optimizing performance, and debugging hard faults. This post dives deep into the ARM calling conventions, stack frame setup, and the distinction between caller-saved and callee-saved registers — all through practical examples. ARM Cortex-M

How the ARM Function Call Stack Frame Works (With C & Assembly Examples) Read More »