Analog-to-Digital Converters (ADCs) are used in almost every embedded system where a microcontroller needs to work with real-world signals such as voltage, temperature, current, or sensor data. Because of this, ADC interview questions are very common in embedded systems and firmware interviews.
In this article, we will cover ADC interview questions and answers from basic concepts to practical and advanced topics. You will learn about ADC resolution, sampling rate, quantization, reference voltage, sampling time, aliasing, accuracy, INL, DNL, SNR, ENOB, ADC architectures, calibration, and common problems faced while using an ADC in a real embedded product. The goal is not just to memorize answers, but to understand how an ADC actually works and how to troubleshoot it in a firmware project.
Q: What is an ADC, and why is it used in embedded systems?
Ans:
An ADC (Analog-to-Digital Converter) converts a continuous analog voltage signal into a discrete digital value that can be understood and processed by a microcontroller or digital processor. Since digital systems operate using binary data, ADCs are required to convert real-world analog signals into digital form.
An ADC performs this conversion mainly through two steps:
- Sampling: The analog signal is measured at regular time intervals according to the sampling rate.
- Quantization: Each sampled value is converted into the nearest digital level based on the ADC’s resolution (such as 8-bit, 10-bit, or 12-bit) and reference voltage. Higher resolution provides smaller voltage steps and better accuracy.
In embedded systems, ADCs are important because many sensors, such as temperature, pressure, light, current, microphones, and potentiometers, produce analog outputs. The ADC allows the microcontroller to read, process, store, and make decisions using these sensor signals. The choice of ADC resolution and sampling rate depends on the required accuracy and speed of the application.
Q: Why can not a microcontroller read analog signals directly?
Ans:
A microcontroller’s digital pins can understand only digital signals, which means they work with only two values: HIGH (1) and LOW (0). They cannot directly measure the exact value of a changing analog voltage.
Most sensors, such as temperature, light, pressure, and sound sensors, produce analog signals with different voltage levels. These voltage changes contain useful information, but the microcontroller cannot process them directly.
An ADC (Analog-to-Digital Converter) converts the analog voltage into a digital number that the microcontroller can understand, store, and process for making decisions.
Q: Explain the basic working principle of an ADC.?
Ans:
An ADC converts an analog voltage into a digital value through three basic steps:
- Sampling: Analog signal is captured at regular time intervals using a sample-and-hold circuit, which holds the voltage steady during conversion.
- Quantization: Sampled voltage is mapped to the nearest available discrete level, based on the ADC’s resolution. This introduces a small, unavoidable error called quantization error.
- Encoding: Quantized level is converted into a binary number representing the digital output.
The final digital value is proportional to the input voltage relative to the reference voltage, following the relation:
/* This is a standard and widely accepted formula for converting an analog voltage to its digital equivalent. */ Digital Output = (Vin / Vref) × (2ⁿ − 1) Where: Vin = Input analog voltage Vref = Reference voltage N = ADC resolution (number of bits)
Example:
If input voltage = 2V, Ref = 5V, and it is a 10-bit ADC:
Digital Value = (2 / 5) × (1023) = 409.2 → Approx 409
Q: What are the important specifications of an ADC?
Ans:
The important specifications of an Analog-to-Digital Converter (ADC) determine its accuracy, speed, and suitability for a particular application.
Resolution: The number of bits used to represent the analog input. A higher resolution provides finer measurement precision.
Example: A 12-bit ADC provides 212 = 4096 discrete output levels.
Reference Voltage (VREF): The maximum input voltage that corresponds to the ADC’s full-scale digital output. It defines the ADC’s input voltage range.
Example: With VREF =3.3V, the ADC measures input voltages from 0 V to 3.3 V.
LSB Size (Step Size): The smallest change in input voltage that can be distinguished by the ADC.
Formula:
LSB Size= 2 N /V REF ,where N is the ADC resolution (in bits).
Sampling Rate (Conversion Speed): The number of analog samples the ADC converts per second, typically expressed in Samples Per Second (SPS) or Mega Samples Per Second (MSPS).
Conversion Time: The time required to complete one analog-to-digital conversion.
Formula:
Conversion Time = 1 / Sampling Rate
Accuracy: Indicates how closely the digital output represents the actual analog input after considering all sources of error.
Quantization Error: The unavoidable error introduced because the analog input is rounded to the nearest digital level. The maximum quantization error is ±0.5 LSB.
Integral Non-Linearity (INL): The maximum deviation of the ADC’s actual transfer characteristic from the ideal straight-line response after offset and gain errors have been removed.
Differential Non-Linearity (DNL): The deviation of each ADC step width from the ideal value of 1 LSB. Excessive DNL can cause missing output codes.
Signal-to-Noise Ratio (SNR): Measures how much the desired signal is above the noise introduced by the ADC. Higher SNR indicates better signal quality.
Effective Number of Bits (ENOB): Represents the actual usable resolution of the ADC after accounting for noise and distortion. ENOB is usually lower than the advertised resolution.
Input Voltage Range: The range of analog voltages that the ADC can accurately convert, typically 0 V to VREF or a differential input range.
Q: What is sampling?
Ans:
Sampling is the process of measuring the value (amplitude) of a continuous analog signal at regular time intervals to create a sequence of discrete-time samples. These sampled values are then converted into digital values by the ADC through quantization and encoding.
Example: If an ADC samples a sensor signal at 10 kHz, it takes 10,000 samples every second. Each sample represents the signal’s amplitude at that specific instant.
The rate at which these samples are taken is called the sampling rate (or sampling frequency), measured in samples per second (Hz). To accurately capture a signal without losing information, the sampling rate must satisfy the Nyquist criterion. This means that the sampling rate must be at least twice the highest frequency component present in the signal.
//Mathematical expression: Fs ≥ 2 × Fmax
where:
- f s = sampling frequency (sampling rate)
- f max = highest frequency component of the input signal
If the sampling rate is too low, higher-frequency components are misrepresented as lower-frequency components, a phenomenon known as aliasing. As a result, the original signal cannot be accurately reconstructed from its sampled data.
Example: To correctly sample a 1 kHz audio signal, the ADC must use a sampling rate of at least 2 kHz according to the Nyquist criterion. In practice, however, systems sample at rates significantly higher than this minimum to provide a safety margin and accommodate the non-ideal characteristics of anti-aliasing filters. For example, audio CDs use a sampling rate of 44.1 kHz, allowing accurate recording of audio frequencies up to approximately 20 kHz, which is close to the upper limit of human hearing.
Q: What are the different types of ADCs??
Ans:
The four main types of Analog-to-Digital Converters (ADCs) are:
- Flash ADC: The fastest ADC architecture, used in ultra-high-speed applications. It offers low resolution and consumes high power.
- Pipeline ADC: Provides high sampling speed with medium-to-high resolution. Commonly used in communication systems and data acquisition.
- SAR (Successive Approximation Register) ADC: Offers a good balance of speed, resolution, power consumption, and cost. It is the most widely used ADC in embedded systems and microcontrollers.
- Sigma-Delta (Σ-Δ) ADC: Provides very high resolution and excellent noise performance but has lower conversion speed. It is ideal for precision measurements such as sensors, instrumentation, and audio applications.
Q: What is aliasing?
Ans:
Aliasing is a phenomenon that occurs when an analog signal is sampled at a frequency lower than twice its highest frequency component (the Nyquist rate). As a result, high-frequency components are incorrectly interpreted as lower-frequency signals, leading to distorted or inaccurate measurements.
Example: If a signal contains a 6 kHz frequency component but is sampled at 8 kHz (Nyquist rate = 4 kHz), the ADC cannot distinguish the true frequency. The 6 kHz signal appears as a 2 kHz signal, producing an incorrect digital representation.
Q: How is aliasing prevented?
Ans:
Aliasing is prevented by ensuring that the input signal is sampled correctly before conversion. The two main methods are:
1. Sample above the Nyquist rate:
- The sampling frequency (Fs) should be at least twice the highest frequency component of the input signal.
- Condition: Fs ≥2 Fmax
2. Use an anti-aliasing filter:
- Place a low-pass filter before the ADC.
- The filter removes frequency components above the Nyquist frequency (Fs/2), preventing them from being folded into lower frequencies during sampling.
Note: Even if the ADC samples above the Nyquist rate, an anti-aliasing filter is still required because real-world signals often contain high-frequency noise or unwanted frequency components that can cause aliasing.
Q: What is the Nyquist theorem?
Ans:
The Nyquist Sampling Theorem states that, to accurately convert an analog signal into a digital signal without losing information, the sampling frequency must be at least twice the highest frequency component present in the input signal.
F s ≥2F max
Where:
- F s = Sampling frequency
- F max = Highest frequency component in the input signal.
This minimum sampling frequency is called the Nyquist rate.
Example:
- Highest signal frequency = 10 kHz
- Minimum sampling frequency = 20 kH
In practice, engineers often sample at a rate higher than the Nyquist rate (e.g., 25–40 kHz) to provide a safety margin and simplify filter design.
Q: What is ADC resolution?
Ans:
ADC resolution is the number of bits used by an Analog-to-Digital Converter (ADC) to represent an analog input as a digital value. It determines how many discrete digital levels the ADC can produce.
A higher resolution provides:
- More quantization levels.
- Smaller voltage step size (LSB).
- Better measurement precision.
- Improved ability to detect small changes in the input signal.
Formula
Number of Levels =2 N, Where: N = ADC resolution (number of bits)
Examples
| ADC Resolution | Number of Levels (2N) |
|---|---|
| 8-bit | 256 |
| 10-bit | 1,024 |
| 12-bit | 4,096 |
| 16-bit | 65,536 |
Example (12-bit ADC):
For a 12-bit ADC with a 3.3 V reference voltage:
- Number of levels = 2¹² = 4096.
- Voltage represented by one LSB:
LSB Size = VREF/2N = 3.3/4096 ≈0.806 mV
Note: Resolution determines the smallest change in input voltage that an ADC can theoretically detect, whereas accuracy indicates how close the measured value is to the actual input voltage. A higher-resolution ADC does not necessarily mean a more accurate ADC.
Q: What is reference voltage?
Ans:
The reference voltage (VREF) is the maximum input voltage that an ADC can accurately convert into a digital value. It defines the ADC’s input measurement range and determines the voltage represented by each digital count (LSB).
- An input of 0 V corresponds to a digital output of 0.
- An input equal to VREF corresponds to the maximum digital output (e.g., 4095 for a 12-bit ADC).
- Any input voltage greater than VREF cannot be represented and will saturate (clip) at the maximum ADC value.
Example (12-bit ADC):
- VREF = 3.3 V
- Input range: 0 V to 3.3 V
- Digital output range: 0 to 4095
| Input Voltage | ADC Output (12-bit) |
|---|---|
| 0 V | 0 |
| 1.65 V | ≈ 2048 |
| 3.3 V | 4095 |
| 3.5 V | 4095 (Saturated) |
Note: A higher VREF increases the measurable voltage range, while a lower VREF provides finer voltage resolution (smaller voltage per ADC count) but reduces the maximum measurable input voltage.
Q: Which ADC is the fastest?
Ans:
Flash ADC.
Q: Which ADC provides the highest resolution?
Ans:
Sigma-Delta ADC.
Q: Which ADC consumes the least power?
Ans:
SAR ADC.
Q: Which ADC is commonly used in STM32 microcontrollers?
Ans:
SAR ADC.
Q: What is conversion time?
Ans:
Conversion time is the time an ADC (Analog-to-Digital Converter) takes to convert a sampled analog input voltage into its corresponding digital value. It starts after the sampling phase is complete and ends when the digital result is available in the ADC data register.
The conversion time depends on:
- ADC clock frequency.
- Sampling time.
- ADC resolution (higher resolution generally requires more conversion cycles).
- ADC architecture (SAR, Sigma-Delta, Flash, etc.)
Example (STM32 12-bit ADC):
- ADC Clock = 20 MHz
- Sampling Time = 12.5 cycles
- Conversion Time = 12.5 cycles
Total time: (12.5+12.5/20MHz) = 25/20×106 = 1.25μs
So, the ADC can perform approximately: Maximum Sampling Rate= 1/1.25μs = 800kSamples/s
Q: What is the purpose of a Sample-and-Hold (S/H) circuit?
Ans:
A Sample-and-Hold (S/H) circuit captures the instantaneous value of an analog input signal and holds it constant while the ADC performs the conversion. This prevents errors that would occur if the input voltage changed during the conversion process.
It operates in two phases:
- Sample phase: A switch closes, allowing a capacitor to charge to the current input voltage.
- Hold phase: The switch opens, isolating the capacitor so it retains the sampled voltage until the ADC completes the conversion.
A Sample-and-Hold circuit is especially important for fast-changing analog signals because ADC conversion is not instantaneous. Even a few microseconds of input variation during conversion can result in an inaccurate digital output.
Example, Suppose an ADC requires 2μs to complete a conversion. If the input voltage changes from 2.5 V to 2.8 V during those 2 μs, the ADC may produce an incorrect digital value. The Sample-and-Hold circuit freezes the input at 2.5 V throughout the conversion, ensuring an accurate and stable digital output.
Note: The Sample-and-Hold circuit ensures that the ADC always converts a fixed voltage, even if the analog input changes during the conversion process.
Q: What is Hold Time in an ADC?
Ans:
Hold time is the duration for which the Sample-and-Hold (S/H) circuit maintains the sampled analog voltage constant while the ADC performs the analog-to-digital conversion.
During the hold time:
- The sampling switch is open.
- The internal sampling capacitor is disconnected from the analog input.
- The capacitor stores the sampled voltage.
- The ADC converts this fixed voltage into a digital value.
Holding the input voltage constant ensures that changes in the analog signal during conversion do not affect the accuracy of the digital output.
Example,
Suppose:
- ADC conversion time = 2 μs
- Input voltage at the sampling instant = 2.5 V
At the end of the sampling phase, the Sample-and-Hold circuit captures the 2.5 V input and stores it on an internal capacitor. During the next 2 μs (the hold period), the ADC converts this stored 2.5 V into a digital value. Even if the actual analog input changes from 2.5 V to 2.8 V during these 2 μs, the ADC continues converting the held 2.5 V, because the input is isolated from the converter during the hold phase. As a result, the ADC produces the correct digital code corresponding to 2.5 V, not 2.8 V.
Q: What is the difference between sample time and hold time??
Ans:
| Sample Time | Hold Time |
|---|---|
| Time during which the ADC samples the input signal and charges the sampling capacitor to the input voltage. | Time during which the sampled voltage is held constant while the ADC performs the analog-to-digital conversion. |
| The sampling switch is closed. | The sampling switch is open. |
| The ADC input tracks the changing analog signal. | The ADC input is isolated, and the capacitor maintains the sampled voltage. |
| Ensures the sampling capacitor is fully charged for an accurate conversion. | Ensures the ADC converts a stable voltage even if the input changes during conversion. |
Q: What is quantization?
Ans:
Quantization is the process of mapping a continuous, sampled analog voltage to the nearest discrete digital level that an ADC can represent based on its resolution.
An analog signal can take infinitely many values, whereas an ADC can represent only a finite number of levels. For an N-bit ADC, the number of available digital levels is 2ᴺ (e.g., a 12-bit ADC has 2¹² = 4096 levels). Since the exact analog value usually does not coincide with one of these levels, the ADC rounds it to the nearest available level.
The difference between the actual analog input voltage and the quantized digital level is called the quantization error (or quantization noise).
Example,
- A 3-bit ADC has 2³ = 8 discrete digital levels.
- If the input voltage lies between two Levels, the ADC converts it to the nearest level. As a result, the digital output differs slightly from the actual analog input, producing a quantization error.
Q: What is quantization error?
Ans:
Quantization error is the difference between the actual analog input voltage and the nearest quantized digital level represented by the ADC.
It occurs because an ADC can represent only a finite number of discrete levels, while the analog input is continuous. During quantization, the ADC rounds the sampled analog voltage to the nearest available digital level, introducing a small error.
Example,
Suppose a 3-bit ADC (8 levels) has a quantization step size (LSB) of 0.5 V.
- Actual analog input = 2.3 V
- Nearest quantized level = 2.5 V
- Quantization error = 2.3 V − 2.5 V = −0.2 V
Q: What is offset error?
Ans:
Offset error is the error that occurs when an ADC produces a non-zero digital output even though the analog input is at zero volts (or at the lowest input value of its input range).
Ideally, when the input voltage is 0 V, the ADC output should be 0. If the ADC outputs any other value, that difference is called the offset error.
Example
For a 12-bit ADC with an input of 0 V:
- Ideal ADC output: 0
- Actual ADC output: 5
The ADC has an offset error of +5 LSB.
Q: What is Gain error?
Ans:
Gain error occurs when the ADC does not increase its output at the correct rate as the input voltage increases. Even if the ADC starts correctly at 0 V (no offset error), it may produce a value that is too high or too low at higher input voltages.
Example,
For a 12-bit ADC (0–3.3 V):
- Ideal: 3.3 V → 4095
- Actual: 3.3 V → 4050
The ADC is giving a lower value than expected, so it has a gain error.
Note:
- Offset Error: The ADC starts from the wrong point.
- Gain Error: The ADC increases too fast or too slowly as the input voltage increases.
Q: What is INL (Integral Nonlinearity)?
Ans:
Integral Nonlinearity (INL) is the maximum deviation of an ADC’s actual transfer curve from an ideal straight line after offset and gain errors are removed. It measures the overall linearity of the ADC across its entire input range and is specified in LSBs. Lower INL means higher DC accuracy. Unlike offset and gain errors, INL is a non-linear error and is difficult to calibrate because it usually requires multi-point calibration or lookup tables.
In simple words, INL tells us how closely the ADC follows a perfect straight-line conversion across its entire input range.
- Lower INL → Better accuracy and linearity.
- Higher INL → More conversion error, especially at certain input voltages.
Q: What is DNL (Differential Nonlinearity)?
Ans:
Differential Nonlinearity (DNL) measures how much an actual ADC step (code width) differs from the ideal step size of 1 LSB. It tells us how uniform each ADC step is.
- DNL = 0 LSB → The step size is perfect (exactly 1 LSB).
- Positive DNL → The step is wider than expected.
- Negative DNL → The step is narrower than expected.
If DNL becomes -1 LSB or less, the ADC may have missing codes. This means some digital output values will never appear, no matter what analog input voltage is applied. Missing codes reduce the accuracy of the ADC and cannot be fixed by simple offset or gain calibration.
Example
Suppose the ideal code width is 1 LSB:
- Actual code width = 1.3 LSB → DNL = +0.3 LSB
- Actual code width = 0.7 LSB → DNL = -0.3 LSB
Q: What are missing codes?
Ans:
Missing codes are digital output values that an ADC can never produce, no matter what analog input voltage is applied.
They occur when the ADC skips one or more output codes because of excessive Differential Nonlinearity (DNL), usually when DNL is less than or equal to -1 LSB.
Missing codes reduce the accuracy and effective resolution of the ADC and can cause measurement errors.
Example, 3-bit ADC (0 V to 8 V):
- Resolution: 3 bits
- Reference Voltage (Vref): 8 V
- 1 LSB = 1 V
| Input Voltage | Expected ADC Output | Actual ADC Output | Remark |
|---|---|---|---|
| 0 – 1 V | 000 | 000 | Correct Output |
| 1 – 2 V | 001 | 001 | Correct Output |
| 2 – 3 V | 010 | 010 | Correct Output |
| 3 – 4 V | 011 | 011 | Correct Output |
| 4 – 5 V | 100 | 100 | Correct Output |
| 5 – 6 V | 101 | 101 | Correct Output |
| 6 – 7 V | 110 | 111 | ❌ Missing Code (110 is skipped) |
| 7 – 8 V | 111 | 111 | Correct Output |
Explanation:
- Ideally, when the input voltage is between 6 V and 7 V, the ADC should output 110.
- However, due to excessive DNL, the ADC skips the code 110 and directly outputs 111.
Since the output 110 never appears for any input voltage, it is called a missing code.
Q: What is a Sigma-Delta ADC?
Ans:
A Sigma-Delta (Σ-Δ) ADC is a high-resolution Analog-to-Digital Converter that uses oversampling, noise shaping, and digital filtering to achieve very high accuracy, even with a simple low-resolution quantizer (typically 1-bit).
Unlike a SAR ADC, which converts an analog input to a digital value in a single conversion cycle, a Sigma-Delta ADC continuously samples the input at a very high rate, generates a high-speed 1-bit data stream, and then uses digital processing to produce a precise multi-bit output.
Three Core Principles:
1. Oversampling:
- Samples the analog input at a frequency much higher than the Nyquist rate (fs >> 2 × fmax).
- Spreads the quantization noise over a much wider frequency range.
- Reduces the noise within the desired signal bandwidth, improving resolution.
2. Noise Shaping:
- Uses a feedback loop (Sigma-Delta Modulator) to move most of the quantization noise from low frequencies to high frequencies.
- The desired signal remains in the low-frequency band with much less noise.
3. Digital Filtering & Decimation:
- A digital low-pass filter removes the high-frequency quantization noise.
- A decimation filter reduces the sampling rate while increasing the effective resolution.
- The final result is a high-resolution digital output.
Q: When is a Sigma-Delta ADC preferred?
Ans:
A Sigma-Delta ADC is preferred when high accuracy, high resolution, and low noise are more important than high conversion speed. It is ideal for applications that measure slowly changing analog signals.
Common Applications:
- Audio systems (microphones, sound recording, high-fidelity audio)
- Medical instruments (ECG, EEG, patient monitoring equipment)
- Precision measurement (digital multimeters, data acquisition systems)
- Industrial sensors (temperature, pressure, strain gauges, load cells)
- Smart energy meters (voltage, current, and power measurement)
- Weighing scales (load-cell signal measurement)
- Scientific and laboratory instrumentation
Why Choose a Sigma-Delta ADC?
- Provides 16–24 bits (or higher) resolution.
- Excellent noise immunity and accuracy.
- Best for low-bandwidth, precision measurements
- Not suitable for high-speed applications such as motor control or video processing.
Note: Use a Sigma-Delta ADC when accuracy is more important than speed.
Q: What is a Flash ADC?
Ans:
A Flash ADC (also called a Parallel ADC) is the fastest Analog-to-Digital Converter (ADC) architecture. It converts an analog input into a digital output in a single clock cycle by comparing the input voltage with multiple reference voltages simultaneously.
Unlike a SAR ADC, which performs comparisons sequentially, a Flash ADC performs all comparisons in parallel, making it ideal for ultra-high-speed applications.
How It Works:
1. Voltage Division
- A precision resistor ladder divides the reference voltage into 2ⁿ equally spaced voltage levels.
2. Parallel Comparison
- The analog input is applied simultaneously to 2ⁿ − 1 comparators.
- Each comparator compares the input voltage with its reference voltage:
- Outputs HIGH (1) if Vin > Vref
- Outputs LOW (0) otherwise
3. Thermometer Code Generation:
- The comparator outputs form a thermometer code, consisting of consecutive 1s followed by 0s.
Example (3-bit ADC):
Comparator Outputs: 1111000
4. Priority Encoding
- A priority encoder converts the thermometer code into the corresponding binary output.
- Thermometer Code → Binary Code
1111000 → 100
| Resolution | Comparators Required (2n − 1) | Resistors Required (2n) |
|---|---|---|
| 4-bit | 15 | 16 |
| 6-bit | 63 | 64 |
| 8-bit | 255 | 256 |
| 10-bit | 1023 | 1024 |
Note: An n-bit Flash ADC requires 2ⁿ − 1 comparators, which causes the hardware to grow exponentially.
Advantages: Ultra-fast throughput (easily hitting Gigasamples per second – GSps), single-cycle conversion, and near-zero pipeline latency.
Disadvantages: Exponential hardware growth (O(2^n) complexity). An 8-bit flash ADC requires 255 comparators, making resolutions above 8 bits heavily impractical due to massive silicon area, high input capacitance, and extreme power consumption. Typical
Applications: Digital Storage Oscilloscopes (DSOs), radar signal processing, ultra-high-speed RF communication front-ends, and video digitization.
Q: Which ADC would you choose for a battery-powered IoT sensor?
Ans:
SAR ADC.
Reason:
- Low power
- Good accuracy
- Fast enough
Q: If Flash ADCs are so fast, why aren’t they used for 12-bit or 16-bit resolution?
Ans:
A Flash ADC requires 2ⁿ − 1 comparators, so the hardware grows exponentially with resolution.
- 8-bit ADC → 255 comparators
- 10-bit ADC → 1,023 comparators
- 12-bit ADC → 4,095 comparators
- 16-bit ADC → 65,535 comparators
Because of this, the chip becomes very large, consumes huge power, has high input capacitance, and generates significant heat, making high-resolution Flash ADCs impractical.
Q: What is a Pipeline ADC?
Ans:
A Pipeline ADC converts an analog signal in multiple stages, with each stage resolving a few bits and passing the remaining signal (residue) to the next stage.
It provides an excellent balance between speed and resolution, making it ideal for high-speed, medium-to-high-resolution applications.
Q: Compare Flash ADC and SAR ADC?
Ans:
| Feature | Flash ADC | SAR ADC |
|---|---|---|
| Speed | Fastest | Medium Speed |
| Resolution | Low (typically 6–8 bits) | Higher (typically 8–18 bits) |
| Power Consumption | High | Low |
| Cost | Expensive | Cost-effective |
Q: Compare SAR ADC and Sigma-Delta ADC?
Ans:
| Feature | SAR ADC | Sigma-Delta (Σ-Δ) ADC |
|---|---|---|
| Conversion Speed | Faster | Slower |
| Latency | Lower latency | Higher latency (due to digital filtering) |
| Resolution | Lower (typically 8–18 bits) | Higher (typically 16–24 bits) |
| Typical Applications | Microcontrollers, motor control, data acquisition, general embedded systems | Precision measurement, industrial instrumentation, audio systems, weighing scales |
Q: Which ADC would you choose for an oscilloscope?
Ans:
Flash ADC.
Reason:
- Extremely high sampling speed
Q: Which ADC would you choose for a digital weighing scale?
Ans:
Sigma-Delta ADC.
Reason:
- Very high resolution
- Low noise
Q: Why is SAR ADC widely used in microcontrollers?
Ans:
Because it offers the best balance of:
- Speed
- Resolution
- Power consumption
- Cost
Q: If you need a 14-bit ADC running at 100 MSPS, which architecture would you choose?
Ans:
Pipeline ADC.
Q: Why is not Sigma-Delta ADC used for motor control?
Ans:
Because it has:
- High latency
- Slow conversion speed
Motor control requires fast, deterministic conversions.
Q: How would you calibrate an ADC?
Ans:
ADC calibration compensates for offset and gain errors to ensure the digital output accurately represents the input analog voltage. High-precision systems may also characterize INL and DNL, although these are generally not corrected in firmware.
1. Hardware (Self) Calibration Preferred:
Most modern MCUs (STM32, NXP, Renesas, TI, etc.) provide an internal calibration routine that measures internal reference nodes and automatically compensates for analog front-end offsets.
HAL_ADCEx_Calibration_Start(&hadc1, ADC_CALIB_OFFSET, ADC_SINGLE_ENDED);
Perform calibration:
- After power-up.
- Before the first conversion
- After significant temperature or supply-voltage changes (if required by the application)
2. Software Calibration
When higher accuracy is required, apply two known precision reference voltages (typically 0 V and VREF), measure the ADC codes, compute offset and gain errors, and compensate every conversion.
Corrected Code = (Raw Code−Offset) × Gain Factor
Example:
| Input Voltage | Ideal ADC Code | Measured ADC Code |
|---|---|---|
| 0 V | 0 | 12 |
| 3.3 V | 4095 | 4070 |
- Offset Error: +12 counts
- Gain Error: 25 counts (4095 − 4070)
The firmware subtracts the offset and applies the gain correction factor to all subsequent ADC results.
Q: Why is ADC calibration necessary?
Ans:
ADC calibration compensates for manufacturing tolerances, temperature drift, and internal analog circuit errors, improving the accuracy and repeatability of ADC measurements.
Q: A 12-bit ADC has a 3.3V reference. What is its resolution??
Ans:
Resolution = 3.3/ 4096 = 0.805mV
Q: A signal frequency is 10 kHz. What is the minimum sampling frequency?
Ans: